Assessment Brief
Programme:
BEng/MEng Electrical Engineering
Module Code:
KD4009
Module Title:
Digital Electronics and Communications
Assessment Title:
001- Submission of a design report
Distributed on:
28/10/2024
Submission Time and Date:
To be submitted by 23:59 GMT on 11/11/2024
Word Limit:
2,000 words (The report should not exceed 10 pages including all figures)
Weighting
This assignment is worth 60% of the module marks. It is an individual assignment.
Submission of Assessment
Electronic Management of Assessment (EMA): Please note if your assignment is submitted electronically it will be submitted online via Turnitin by the given deadline. You will find a Turnitin link on the module’s eLP site.
The marks will be returned on eLP together with individualised feedback after the assessment submission deadline within 21 working days.
It is your responsibility to ensure that your assignment arrives before the submission deadline stated above. See the University policy on late submission of work.
Instructions on Assessment:
Answer all questions (see end of brief). Show evidence of simulations using Logisim by printing your programs. You can submit an electronic copy of your assignment.
Mapping to Programme Goals and Objectives
Knowledge and Understanding:
1. Knowledge of mathematics will be applied to analyse communication systems and digital circuits, will be assessed in the coursework. (AHEP4, C1) 2. Communication systems and digital circuits will be analysed using engineering principles, will be assessed in the coursework. (AHEP4, C2)
Intellectual / Professional skills & abilities:
3. Design methodology will be covered, starting from a set of specifications and design of digital and communication systems. This will be assessed in the coursework. (AHEP4, C5)
Module Specific Assessment Criteria and Rubric
The marking scheme is given below.
ASSESSMENT REGULATIONS
You are advised to read the guidance for students regarding assessment policies. They are available online here.
You should take particular attention to the Academic Misconduct Policy document in section 3.6, with regards to using Artificial Intelligence Systems in your assignments
You are reminded that plagiarism, collusion and other forms of academic misconduct as referred to in the Academic Misconduct procedure of the assessment regulations are taken very seriously. Assignments in which evidence of plagiarism or other forms of academic misconduct is found may receive a mark of zero.
Assessment Brief
Page 2 of 3
Late submission of work
Where coursework is submitted without approval, after the published hand-in deadline, the following penalties will apply.
For coursework submitted up to 1 working day (24 hours) after the published hand-in deadline without approval, 10% of the total marks available for the assessment (i.e.100%) shall be deducted from the assessment mark.
Coursework submitted more than 1 working day (24 hours) after the published hand-in deadline without approval will be regarded as not having been completed. A mark of zero will be awarded for the assessment and the module will be failed, irrespective of the overall module mark.
These provisions apply to all assessments, including those assessed on a Pass/Fail basis.
The full policy can be found here.
Students must retain an electronic copy of this assignment (including ALL appendices) and it must be made available within 24hours of them requesting it be submitted.
Word Limit
If the assignment is within +10% of the stated word limit no penalty will apply. The word count does not include: appendices, glossary, footnotes, tables
Please note, in text citations [e.g. (Smith, 2011)] and direct secondary quotations [e.g. “dib-dab nonsense analysis” (Smith, 2011 p.123)] are INCLUDED in the word count.
Students must retain an electronic copy of this assignment (including ALL appendices) and it must be made available within 24hours of them requesting it be submitted.
The full Word Limit Policy is available here.


Assessment: A Customised Counter (L1, L2, L3)
Problem Statement:
We want to design a sequential circuit that has one input, one 𝑟𝑒𝑠𝑒𝑡̅̅̅̅̅̅̅ pin and one output. The circuit should be able to:
1.
Count down in a sequence of 2 → 1 → 0 and repeat this cycle when the input is 1 and the 𝑟𝑒𝑠𝑒𝑡̅̅̅̅̅̅̅ is 1;
2.
Stay the same (does not count up or down) when the input is 0 and 𝑟𝑒𝑠𝑒𝑡̅̅̅̅̅̅̅ is 1;
3.
Restart counting from 2 when the 𝑟𝑒𝑠𝑒𝑡̅̅̅̅̅̅̅ is 0;
The output is 1 when the circuit count is 2; otherwise the output is 0.
You can design the circuit using any of the components that we covered in this module.
Objectives:
1
- Explain your approach for your design using relevant tools (such as Karnaugh maps, state diagrams, timing diagrams, etc.) (10%)
2
- Show your design steps clearly. (15%)
3
- Design the circuit and create the schematic in the simulation software:
a.
Use proper type of components and wire connection to complete the circuit (10%)
b.
Comment on the schematic (5%)
c.
Use hierarchy wherever possible to create a modular design for simplicity (5%)
4
- Perform the simulation:
a.
Simulate the circuit and demonstrate the operation of the circuit showing the counting sequence (15%)
b.
Simulate the circuit and show that the counter can be reset as specified. (15%)
5
- Search for commercially available IC’s that you can use to implement your design. Draw a schematic for your design including IC’s. You should show all the required connections (including power supplies) to the IC’s for proper operation. (25%)
The report needs to be submitted as a PDF file with each section clearly specified using the numbers given in the objective section.

Attachments: